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The Path to Future Interconnects

Thursday, July 16
Moscone North, Hall E, Room 133      SRC logo- SEMICON West 2015    EDS logo- SEMICON West 2015

Session Partner: IEEE Electron Devices Society and Semiconductor Research Corporation (SRC)     

The rate of improvement in high performance computing has slowed dramatically. This has been primarily caused by the energy constraints coming from moving data across interconnect networks. The architecture that has driven the exponential growth in computing for over 70 years has led us to this point by requiring data to be transported between processors and memory parts of the system, and more recently also between multiple processing cores on chips.

Evolutionary approaches to address this challenge are increasingly ineffective, and breakthroughs can happen now only with a system-level view, and co-optimization from processing and materials, through devices and circuits, to system architecture.

Our session speakers will describe the nature of the challenges in fundamental materials and processing of current and future interconnects, and their impact on circuit and system requirements. They will also provide a glimpse of possible research directions that could address this challenge with collaboration and revolutionary approaches.


Morning Session (10:00am-12:30pm)


 Jon Candelaria- SEMICON West 2015



Welcome & Opening Remarks

Jonathan Candelaria (Biography)

Director, Interconnect and Packaging Sciences

Semiconductor Research Corporation


ITRS Update


Mehul Naik- SEMICON West 2015

Interconnect Performance and Yield Challenges for 7 nm and Beyond (Abstract

Mehul Naik, Ph.D. (Biography)

Principal Member of Technical Staff

Applied Materials 


Larry Zhao- SEMICON West 2015



Challenges and Solutions for Future Cu and Non-Cu Interconnects (Abstract)

Larry Zhao, Ph.D. (Biography)

Technical Director

Lam Research



Azad Naeemi- SEMICON West

CMOS Circuit Impact of Interconnects – Cu and Beyond (Abstract)

Azad Naeemi, Ph.D. (Biography)

Associate Professor

Georgia Institute of Technology


Ramakanth Alapati- SEMICON West 2015

3DIC Technology Past, Present and Future (Abstract)

Ramakanth Alapati (Biography)

Director, Packaging Strategy and Marketing




  Speaker Panel, Open Discussion


Afternoon Session (2:00pm-4:30pm)


Jon Candelaria- SEMICON West 2015           

Welcome & Opening Remarks

Jonathan Candelaria (Biography)

Director, Interconnect and Packaging Sciences

Semiconductor Research Corporation


Keren Bergman- SEMICON West 2015



Silicon Photonic Interconnection Networks for Energy Efficient Scalable Data Movement in High-Performance Computing (Abstract)

Keren Bergman, Ph.D. (Biography)

Professor and Chair of Electrical Engineering

Columbia University


Azad Naeemi- SEMICON West


Interconnects for Emerging 'Beyond CMOS' Devices and Circuits (Abstract)   

Azad Naeemi, Ph.D. 

Georgia Institute of Technology


Jan Vanfleteren- SEMICON West 2015


Interconnects for Flexible/Stretchable Circuits (Abstract)

Jan Vanfleteren, Ph.D. (Biography)

Senior Engineer and R&D Manager



Jan Rabaey- SEMICON West 2015

Lessons from Brain Connectivity (for Future Interconnect Circuits) (Abstract)

Jan Rabaey, Ph.D. (Biography


UC Berkeley


Speaker Panel, Open Discussion


Please check back frequently for updates and more information as agendas develop and speakers are announced.



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