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Day pass includes morning session:


Making Sense of the Lithography Landscape:
Cost and Productivity Issues Below 14nm and the
Path(s) to 5nm 



Scaling Transistors: HVM Solutions Below 14nm; Getting to 5nm 


Wednesday, July 15
Moscone North, Hall E, Room 133       
            Session Sponsor:


Manufacturing at 14nm is a reality. Looking ahead, choices for materials and process modules have to be in their final stages in order for the industry to stay on track for introduction of the next node. At the same time, R&D efforts to get the industry to 5nm continue. This session covers how high-volume manufacturing (HVM) solutions are taking shape below 14nm – including the role that EDA tools will need to play – and summarizes R&D activities needed to get to 5nm.



2:00pm-2:05pm Welcome and Introduction

Debra Vogler (Biography)

President & Founder

Instant Insight Inc.


Scaling Towards 5nm

An Steegen, Ph.D. (Biography)

SVP, Process Technology


Entering the Substrate Era to Support High-volume Manufacturing Down to 5nm


Christophe Maleville (Biography)
SVP, DIgital Electronics BU

The Rough Road to 5nm


Raj Jammy, Ph.D. (Biography)
Scientific Advisor


Variability Control with Atomic Layer Processing to Enable Advanced Patterning


Harmeet Singh (Biography)
Corporate Vice President
Lam Research


3D In-Die HVM Metrology Solutions <14nm FinFETS to 5nm NanoWires


Ofer Adan (Biography)
Global Product and Technology Manager, Process Diagnostics and Control
Applied Materials 


Moving beyond the Last Node Ever – A perspective From the Design-manufacturing Interface



Juan Rey (Biography)
Sr. Engineering Director

Design to Silicon Division
Mentor Graphics



For more information about other STS Sessions, Click STS Sessions


        By June 5               Starting June 6        
Member (Day Pass)       
  $196   $262
Non Member (Day Pass)
  $262   $349


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